In semiconductor manufacture, semiconductor wafers need to be processed to be flat both initially and at various stages of manufacture. As device features become smaller and smaller, as in the submicron size range, and as such features have increasingly tight tolerances, the importance of achieving a desired level of flatness increases. Without attaining a desired level of flatness, other efforts toward obtaining consistent functionality in submicron size chips tend to falter.
Toward achieving consistently flat wafers, specific apparatuses and methods related to the process of chemical mechanical polishing (CMP, also referred to as chemical mechanical planarization) have been developed. CMP, which combines chemical etching and mechanical abrasion to produce a flat surface, is used in wafer preparation and in wafer fabrication. A polishing pad is used during CMP. In a typical CMP operation, this pad is installed onto a rotating turntable, and one or more wafers to be planarized are disposed in abrading contact with the polishing pad surface, and a slurry is applied. The slurry typically contains a polishing agent, for instance alumina or silica, and other chemicals that etch or oxidize the wafer surface. Through such abrading contact, including with application of a slurry, the wafer surface is effectively polished and made more planar.
General and specific aspects of CMP apparatuses and processes are disclosed in U.S. Pat. Nos. 6,095,908, issued Aug. 1, 2000 to K. Torii, 6,432,258 issued Aug. 13, 2002 to Kimura and Yasuda, and 6,746,312 issued Jun. 8, 2004 to H. Torii et al. These references, and all other references cited herein, whether patents, patent application publications, scientific or technical publications, or other publications, are hereby incorporated by reference for their teachings. As indicated below where appropriate, certain references are incorporated with particularity for indicated teachings.
Typically both the polishing pad and the wafers are rotating in the same direction during the process. Force is applied by various means known in the art to maintain a desired pressure through the wafer(s) onto the polishing pad surface. While the method of attachment of the polishing pad to the turntable is fairly robust, such as self-sticking adhesive, the wafer(s) may be attached to their respective rotating top rings by suction or other type of light vacuum.
For certain models of CMP devices, the surface tension of the slurry between the polishing pad surface and the wafer(s) surface may be greater than the force holding the wafer(s) to their respective rotating top rings. This does not present a problem during polishing rotation, but can result in separation of wafer(s) from the top rings if the wafer(s) is/are lifted directly away from the rotating polishing pad surface. To avoid such occurrence, a common routine at the end of the CMP process is to rotate the wafer(s) to the side of the polishing pad, so that a portion (i.e., one-third or two-fifths) of the wafer surface is extending beyond, and not in contact with, the polishing pad. This is known as the “unload position.”
One reference that discloses this method, and specific rotational speeds to better achieve wafer unloading, is U.S. Pat. No. 6,746,312, which is specifically incorporated by reference for these teachings. Moving wafer(s) to this unload position effectively “breaks” the surface tension sufficiently so the wafer(s) may then be lifted away (i.e., upward) from the polishing pad surface without separating from their respective rotating top rings.
However, this practice has led to observation of a specific pattern of defect on some wafers that go through this removal process. The specific pattern is comprised of a central ring of defects that corresponds to the alignment of the wafer with the edge of the polishing pad, and with a lesser frequency of defects throughout the wafer at points peripheral to this ring. The present invention identifies causative factors leading to this problem and provides a method and system to assess, quantify, and correct this problem in order to attain polished semiconductor wafers with less defects related to moving the wafers to the unload position.